CS302 Digital Logic Design Assignment No.3 Discussion And Solution Semester Spring 2014

Objective: The assignment has been designed to develop the understanding related to the followings, Power dissipation Latches Instructions: Please read the following instructions carefully before solving & submitting assignment: It should be clear that your assignment will not get any credit (zero marks) due to followings, 1.      The assignment is submitted after due date. 2.      The submitted assignment does not open or file is corrupt. 3.      The assignment not submitted in MS Word file format. 4.      The assignment is copied (from other student or copied from handouts or internet). 5.      Student ID is not mentioned in the assignment file or name of file is other than student ID. For any query about the assignment, contact only at CS302@vu.edu.pk Do not post queries related to assignment on MDB. GOOD LUCK

Question 1                                                                                                                                          [10 Marks] Suppose a circuit contains three flip-flops, each flip flop is connected to +5 volts and each flip-flop draws 3.5 mA of current during its operation. Analyze the given circuit to write the formula and calculate the overall power dissipation. Question 2                                                                                                                                                                   [5 Marks] Suppose that the current output is logic high and input combination is R=1, S=0.Fill the logic gates in 0 or 1 form at points in the circuit given below which is indicated by green boxes. Note: Fill out only final stable values in given green boxes.