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Sunday, 7 December 2014

CS302-Digital Logic Design Assignment No.2 Solution And Discussion Fall 2014

CS302-Digital Logic Design
Assignment No. 02
Semester: Fall 2014
Total Marks: 25
Due Date: 09/12/2014
Uploading instructions:

 Your assignment must be in .doc format. (Any other formats like scan images, PDF, Zip, rar, bmp, etc will
not be accepted).
 Save your assignment with your ID (e.g. bc020200786.doc).
 No assignment will be accepted through email.
Rules for Marking:
It should be clear that your assignment will not get any credit if:
 The assignment is submitted after due date.
 The submitted assignment does not open or file is corrupted.
 Your assignment is copied from internet, handouts or from any other student
(Strict disciplinary action will be taken in this case).
Assignment
Question 1 [10 Marks]
See the following Karnaugh Map, identify adjacent groups of 1's, and generate a minimal SOP expression from those
groupings.
AB\CD 00 01 11 10
00 1 0 1 1
01 0 1 1 1
11 × × × ×
10 1 1 × ×
Question 2
[10 Marks]
Using Quine-McCluskey method, reduce the expression given below by following all the steps.
X=A’B’C’D’+A’B’C’D+A’B’CD’+A’BCD’+ A’BCD+AB’C’D’+AB’C’D+ ABCD’
Question 3 [5 Marks]
Simplify following expression using Boolean algebra rules and mention on each step the rule applied.
A’(A + B) + (AA + B)(A + B’)
NOTE: Do not put any query on MDB regarding assignment, if you have any query email at cs302@vu.edu.pk.
Deadline: Your assignment must be uploaded/submitted on or before 9th December 2014.

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